Does PCB Artwork Change Radiated EMI? Testing Common Layout Rules Against Measurements
イチケン / ICHIKEN
This session was recorded at the Ichiken Lounge at Techno Frontier 2026 (July 15–17, 2026), as part of a series themed "The Cutting Edge of In-Vehicle EMC in the Era of Electrification and ADAS." Its title was "How PCB Artwork Design Affects EMI: Verifying What Works and What Doesn't Through Actual Measurements," and the guest was an engineer from Ontec Co., Ltd. The question was simple: many layout rules of thumb are repeated as if they were settled, so which of them actually change radiated noise on a real board? The speaker's answer, based on a series of simple test boards, was mixed. Some rules held up clearly. Others made little difference. A few produced the opposite of what people expect, and in several cases the speaker said openly that they did not yet have a confirmed explanation.
The Speaker and the Company
Ontec is headquartered in Osaka. Its printed circuit board business handles design, manufacturing, and assembly in-house, and a separate System Solutions business develops factory-automation products.
The speaker got an amateur radio license in fifth grade and used to buy parts in Osaka's Nipponbashi district to build radios. They joined the company in Heisei 1 (1989), when it was called ON Electronics Co., Ltd., and were assigned to artwork design for CRT televisions. At the time they drew layouts with paper and pencil at a drafting table, smoking as they worked. For roughly the past 20 years they have focused mainly on circuit board simulation, and the company runs a site dedicated to it, simulation-pcb.com. Simulation is still their main job, but this session was about the relationship between measured results and artwork.
The Test Setup
Testing layout effects on a finished product is difficult, so the speaker built a deliberately simple experimental board. It contains one 50 MHz oscillator, a 22 Ω damping resistor, and a 5 pF capacitor. Power comes from four AA batteries stepped down to 3.3 V by a linear regulator, so that the power supply itself would not be a noise source. The power supply board is shared, and the speaker built many variants of the oscillator board and swapped them in and out.
The measured quantity was radiated noise. Measurements were taken with the 3-meter and 10-meter methods under consumer standards. The speaker noted that many attendees were from automotive companies. Every result below applies to this 50 MHz clock, and the speaker said more than once that outcomes could change at higher frequencies.
Shorter Traces Were Not Quieter
The first rule tested was that shorter signal traces produce less noise. One board routed the 50 MHz clock as a microstrip line about 130 mm long. The other placed the components next to each other with the shortest possible wiring. The short-trace board showed slightly more radiated noise, the opposite of the expected result. The speaker's guess was that the long power cable probably had more influence on radiation than the signal line itself.
A Meander Trace Radiated Less
The second test compared a straight microstrip line about 140 mm long with a meander version about 293 mm long. The common expectation is that the meander would be noisier. It measured quieter.
The speaker stressed that they could not say for certain why. Their personal view is that parts of a meander face each other and carry current in opposite phases, so the magnetic flux partly cancels and radiation drops. The host pointed out that this assumes a 50 MHz signal, and the speaker agreed that results could change somewhat at higher frequencies.
Bypass Capacitor Routing: The Clear Result and the Puzzling One
The next test concerned the advice that current should flow through the bypass capacitor: from the IC power pin, through the capacitor, and only then down a via to the power plane. On the slides, pink marked the power line and green marked ground. The comparison board kept the distance from the power pin to the capacitor exactly the same and changed only the via location, so current did not pass through the capacitor.
The layout where current bypassed the capacitor showed significantly more radiated noise, as expected. The speaker explained that noise generated between the oscillator and the power supply leaks into the power path unless the capacitor sits properly in that path. The practical takeaway matched the usual advice: place bypass capacitors close, along the shortest path.
A follow-up test was less tidy. The speaker took one of the noisier layouts and redesigned it so current did flow through the capacitor. Radiated noise barely changed. The speaker had not confirmed why. One hypothesis was that the power pin and the power via are so close together that crosstalk occurs between them. Another suspect was that the ground-side route was not a flow-through route. A new experimental board was being designed at the time of the talk, with results expected around the fall. The speaker also said that when traces become long enough to couple capacitively, a design that does not route through the capacitor can sometimes be better. They described this result as specific to the case and hard to generalize.
Capacitor on the Back Side, and Rescuing It
Another common rule is to place the capacitor on the same side as the IC. Moving it to the back side increased noise, as people predict. The speaker attributed this partly to via inductance, since the path now runs through a via and gets effectively longer, and partly to the fact that this layout also lacked a flow-through structure.
In the next variant, the capacitor stayed on the back side but the routing was changed to flow-through: a via is drilled first, current passes through the bypass capacitor, and then it connects to the power supply wiring. Noise dropped by about 5 dB. The speaker concluded that when a capacitor cannot go on the component side, a flow-through structure through the via can still give good results. They added a practical limit: under a BGA package there is usually no room to add extra power vias at all.
Pi Filters and the Cost of Compact Layout
For cases where a back-side capacitor cannot be fixed that way, the speaker tried adding a CLC pi filter between the back-side placement and the power supply. The improvement was dramatic.
The first pi filter layout was spread out and took quite a bit of space. Artwork designers usually try to minimize area, so the speaker also tested a compact arrangement. It was 3 to 4 dB worse, though still under the regulatory limit. The speaker's interpretation was that noisy current flows in the section before the filter, and in the compact layout that section sits right next to the clean section after the filter, so noise couples across by crosstalk and radiates.
Their recommendation had two parts. Where space allows, use the ideal spread-out layout. Where the layout has to be compact, a compact pi filter is still likely to perform much better than leaving the filter out.
Paralleling Capacitors: Same Values Versus Mixed Values
Placing two identical 0.1 µF bypass capacitors in parallel turned out to be quite effective. The speaker then addressed the common practice of pairing different values, such as 1000 pF with 0.1 µF, on the assumption that the smaller value covers high frequencies.
According to the impedance curves they had seen in simulation, mixed values create bad frequency bands where performance is worse than with two 0.1 µF parts. They added that the ESR component tends to become significant and the result does not match expectations. To make mixed values work, they said you need PI (power integrity) analysis to tune the values so the impedance comes out as intended. Without that analysis, dropping in a 0.1 µF plus 1 nF pair to lower impedance is difficult to get right, and simply paralleling identical values is the quicker approach.
On adding a third and fourth capacitor, the speaker explained that parallel inductance halves with two parts and falls to one third with three. The benefit shrinks with each added part, so more is not necessarily better.
Capacitors Along the Power Line to Suppress Resonance
The speaker also tested four capacitors placed along the long power line running from the battery to the oscillator, intended to suppress resonance. Compared with the noisy same-side pattern, this improved radiated noise significantly, and the speaker thought it could be quite effective in practice.
Asked whether the values need careful calculation, the speaker said 0.1 µF should be effective enough. Their simulations suggested that changing the value would not make much difference. What does matter, they said, is ESL: the lower the ESL, the greater the effect.
Guard Ring Around the Clock
Moving to the signal side, the speaker tested a ground guard ring, sometimes called a shield, around the 50 MHz clock trace, grounded along its whole length. It improved radiated noise by about 4 dB. Both the speaker and the host were a little surprised that such a thin guard ring worked so well.
Routing the Clock in an Inner Layer
The common belief is that routing a signal in an inner layer reduces noise. The speaker moved the same clock trace to layer 3, sandwiched between ground layers above and below to form a stripline. Noise did improve, but less than the speaker had hoped. At some frequencies the level dropped sharply, while the peak frequencies changed little.
The host mentioned taking apart a PS5, where the CPU-to-DDR memory wiring sits on the surface layer or in an inner layer depending on the console generation. They wondered whether that choice came from simulation and trial and error. The speaker noted that this test used only 50 MHz, and said that for DDR4 or LPDDR4-class memory, where some people argue for inner-layer routing, they were starting to think that argument might be right.
Stitching Vias: Worse for Radiation, Better for Signal Quality
Another widely held idea is that adding ground vias reduces noise. Starting from the shielded trace, the speaker compared a version with a solid ground fill on the surface against versions with added ground vias along the shield. At a 15 mm pitch, results got slightly worse. At a 5 mm pitch, they also got slightly worse, though only by a small amount.
The speaker again said they could not be sure why. Their guess was that with many ground vias, current flows vertically through them in the same direction, the magnetic fields line up so that they repel, and this may make radiation worse.
The host asked whether signal quality would show something different. The speaker agreed. In simulations of transmission characteristics up to 20 GHz, there was a clear difference between boards with and without vias: more vias meant lower loss at high frequencies. The line was not impedance-controlled to 50 Ω, so it had a lot of reflection, but even so, more vias meant less loss. From a signal quality standpoint, more vias may be better.
Since the radiated penalty was only about 1 dB, the host asked whether it made sense to add vias freely for the sake of signal quality. The speaker said it depends on frequency and application. For RF work, many vias may be the better choice. For a 50 MHz clock like this one, they saw no need to be strict about adding vias over and over.
Crossing a Slit, and a Small Bridge
Routing a trace across a slit in the ground plane is said to increase noise, and the measurements agreed: radiated noise rose significantly. As a stopgap, the speaker added a ground trace on the component side that bridges the slit. Noise dropped to about the level of the board with no slit. The host and speaker both found it surprising that such a small bridge, rather than a full ground fix, was enough.
Right-Angle Corners
The last test addressed the claim that right-angle bends cause noise, sometimes explained as electrons colliding at the corner. The speaker said they had seen this claim in a book and did not believe it, so they built a board to test it. They compared a right-angle trace with one using a gentle rounded bend. The difference was around 0.5 to 1 dB, essentially unchanged.
The speaker clarified that they were not recommending right angles. At high frequencies, impedance drops at a right-angle corner and reflections may increase. Right angles also have a manufacturing drawback: etching solution tends to pool in the corner, which can lower yield. The point they wanted to demonstrate experimentally was narrower: at frequencies like this, a right angle does not by itself increase radiated noise. Asked where rounding the corners starts to matter, the speaker said that, based on a conceptual simulation, right angles become a problem probably above about 10 GHz, and they did not see a real issue below that.
When EMI and Signal Integrity Pull in Different Directions
In closing, the speaker said that from the standpoint of radiated noise, some results matched popular expectations and some did not. The via results were the clearest case of a split: EMC performance barely changed while signal quality improved. The host observed that EMI and signal integrity now seem nearly inseparable, and asked how to set priorities when they conflict.
The speaker called it a difficult problem. Signal quality is extremely important for guaranteeing performance, so one option is to prioritize signal quality and handle EMI by other means. On the other hand, addressing EMI early can make later work easier. Their answer was that it depends on the item being designed. Several of the day's puzzles remained open, including why the flow-through bypass redesign did not help, and the speaker expected the next experimental board to report results around the fall.
Hello. In this video, we cover the event held from July 15 to 17, 2026, at the Ichiken Lounge at Techno Frontier 2026. Here is a look at the conversation. The theme is “The Cutting Edge of In-Vehicle EMC in the Era of Electrification and ADAS.” This video is one of the 12 interviews: “How PCB Artwork Design Affects EMI—Verifying What Works and What Doesn’t Through Actual Measurements.” Here is the video on the effect of printed circuit board tracing on emissions. Let's take a look at some design examples along with the measurement results. Here you go.
Since it's about time, I'd like to get started on the next session. “EMI Changes with PCB Artwork Design”—going even deeper into the layers, down to the printed circuit board level, how does the noise performance compare? This session will take a look at that. The title is “How PCB Artwork Design Affects EMI—Verifying What Works and What Doesn't Through Actual Measurements.” This is an interview with Ontec Co., Ltd. I look forward to working with you today.
Thank you in advance.
First, I’d like to give you a brief overview of our company. We are Ontec Co., Ltd., and this is our printed circuit board business, headquartered in Osaka. We have a system in place that allows us to handle the design, manufacturing, and assembly of printed circuit boards end-to-end in-house. Also, in the System Solutions business, we develop FA-related products.
The first speaker of the day mentioned that you used to be an amateur radio operator. I also got my amateur radio license when I was in the fifth grade. From there, I bought some parts in Nipponbashi, Osaka, and I used to assemble radios and things like that.
In Heisei 1, by a stroke of fate, I joined what is now Ontec. At the time, the company was called ON Electronics Co., Ltd. I joined that company, and I was assigned to artwork design for a CRT TV. Back then, I used to sit at my drafting table and design with paper and pencil while smoking. Those were the days. Then, about 20 years ago, I came to focus primarily on simulation work on circuit boards, and that brings us to the present. We also operate a website specializing in simulations of these types of circuit boards, called simulation-pcb.com.
As a professional in printed circuit boards, and since I'm an EMC professional, I think this will be a very hands-on session, so please be sure to listen to it.
With that, let’s move forward with these topics today. Whether or not something in the PCB artwork works for noise is quite difficult to determine at the product level, so I built a simple test board and ran some measurements. My main job is in simulation, but this time, we'll discuss the relationship between actual measurements and artwork. Let me introduce you to it.
The circuit is very simple—it consists of just a single 50 MHz oscillator. There is a 22-ohm damping resistor and a 5 pF capacitor attached. For the power supply, I use four AA batteries and step down to 3.3 V using a linear regulator. I am building an experimental circuit board assuming that no noise is generated on the power supply side.
I wonder what exactly we'll be measuring here.
We will measure the radiated noise. There are quite a few automotive manufacturers participating in this session, but here are the measurement results obtained using the 3-meter and 10-meter methods in accordance with consumer standards.
Is this the actual circuit?
That's right. Here, the power supply boards are shared. We created various versions of this experimental board, and I'm watching to see what happens as I keep switching back and forth.
This experiment board contains an oscillator circuit, and in terms of frequency, a 50 MHz signal is sitting on top of this. As we measure the radiated noise from this, first of all, the question is whether shorter wiring lengths result in less noise.
Generally, I get the feeling that people think the shorter the signal lines on a circuit board are, the less noise there is. I decided to try it out. The circuit board on the left is about 130 mm long. The clock signal from the 50 MHz oscillator is wired using a microstrip line. On the other hand, on the right-hand circuit board, the components are arranged with the shortest possible wiring distances between adjacent ones. It seems to be a very, very short one.
When you measure radiated noise with this, it looks like this. The results show that the shorter one has slightly more noise. It's a little hard to see, but can you make it out?
I'm wondering if the result turned out to be the opposite of what I expected. I think it feels kind of the opposite. Why is that?
Probably more than this signal line would affect it, I'm wondering if the long power cables might be causing the problem.
Here's another example. This is the same microstrip line as before. The one drawn in a straight line has a trace length of approximately 140 mm. This is what is commonly referred to as “meander wiring.” The trace length has increased to approximately 293 mm. Looking at this, it seems like the meander wiring has more noise, but when we actually take the measurement, this is a case where, surprisingly, there was less noise with the meander wiring than expected.
I have some meander wiring here, but they say there's less noise that way. I suppose this also feels a bit counterintuitive. Is there any analysis or discussion regarding this as well?
It can't be said with absolute certainty that this is exactly the case. I can't say for sure, but in my personal opinion, by implementing this meander wiring, the currents are out of phase. Current flows in a direction that cancels out the magnetic flux. Because there is this section where they face each other, I wonder if this has actually reduced the radiated noise. That is our view.
I see. By the way, the premise is that it's a signal from a 50 MHz oscillator, right?
That's right. As the frequency gets a little higher, I think there's a possibility that things might change a bit.
I see. This is also what people say. It feels like the results turned out a little differently than expected. Next, then.
Bypass capacitors should be wired to allow current to flow through them. Bypass capacitors are often configured like this. It’s often said that you should route from the power pin through the bypass capacitor, then through a via down to the power plane.
Red is the positive terminal, and green is the ground.
That's right. Pink is the power line, and green is ground. Here is the wiring diagram if you don't do that. The distance from the power pin to the bypass capacitor is exactly the same. It's just that the ground via is in a different location. This is designed so that the current flows through the bypass capacitor. This one isn't.
When you measure radiated noise, as expected, the results showed that there was significantly more noise in the one that doesn't go through the bypass capacitor.
This noise originates in the section between the oscillator circuit and the power supply. So, the question is how much noise was transmitted, right? Unless you place the bypass capacitor closer to you, noise leaks into the power path. I think this is probably why we ended up with this result.
This is exactly the result everyone was expecting, isn't it? Place bypass capacitors as close as possible along the shortest path. That's what you're saying, right?
Next, there was a lot of noise with this earlier, so if we design it so that the current flows through the bypass capacitor, will things get better? I tested that out again in an experiment. The results show that things didn't improve much.
Could you show me the circuit again? We've designed it so the current can flow all the way through, but the results show that there wasn't much of a change. By the way, why is that?
I haven't quite been able to confirm this yet, but since this power pin and this power via are a little too close together, could this be causing crosstalk? That's what I'm thinking, but since I haven't made the experimental board yet, there are some things I can't say for certain. What I'm finding a little suspicious right now is the route on this field. Since this route isn't a through route, I've been thinking that this one might be suspicious, too. The next experimental board is currently being designed, and I'm hoping to be able to announce it around fall.
When the wiring gets too long, if they're close enough to be capacitively coupled, there are cases where it’s better to design the system so that it doesn’t pass through the bypass capacitor. It’s just that, in this particular case, things turned out this way, so it's hard to say in general, but I guess that could happen.
I see. Thank you.
Next, a common saying is: should the capacitor be placed on the same side as the IC? I compared those arranged on the same plane and those placed on the back side. As people have been saying, I guess you could say this is just as expected. Placing it on the back side actually increases the noise level. That is the result.
Is it because the route got longer? Could that be related to that?
I believe the inductance of the via may be having an impact.
Since we'll be passing through a via on the way, I guess you could say it feels like it's gotten longer because of that.
As I mentioned earlier, the fact that it isn't designed as a through-structure might also be one specific reason for this.
I see.
Would it help if we made it a pass-through structure next? I'm looking at that. First, drill a through-hole, and then it passes through the bypass capacitor and connects to the power supply wiring. If you set it up that way, it drops a little. I guess the through-structure really is very effective. That is the result.
About 5 dB, I guess? What I can say is that if it can't be placed on the component side, even on the reverse side, if you design it as a pass-through structure through the via, we might get good results.
In theory, that's true, but in practice, for example, with BGA packages, I don't think there's any space at all to add extra power vias. So, the question is, what should we do? Next, when I put it on the back side, what happens if I install a π-type filter? I'm trying this out. Compared to the one placed on side B, just as before, next I'll connect it to the power supply through a π-type filter. If you do that, using a π-type filter makes a dramatic difference.
Is this a CLC type?
That's right. If you install a CLC π-type filter, the results show that it has improved significantly.
It really feels like a true π-type filter, doesn't it?
I've arranged it this way this time, but it takes up quite a bit of space. In artwork design, we strive to minimize the area as much as possible. People tend to arrange things this way. How much of a difference does this arrangement make? I'm looking at that. It wasn't high enough to exceed the regulatory limit, but the results show that the situation has deteriorated slightly.
That's true. Does it feel like it's gone up by about 3 or 4 dB? Looking at this, I realize that trying to make things too compact might—I wonder how things will turn out.
That's right. I do think there might be some competition for the spot. For areas where there's plenty of space, use a layout like this. It's best to create an ideal layout. Even though we have no choice but to keep it compact, I think using a π-type filter might be capable of delivering much better performance than using a bypass capacitor without a π-type filter.
By the way, why did you lay it out this way? What are your thoughts on whether the numbers have actually gotten worse?
There is a current with a lot of noise flowing through here, and I'm trying to cut it out using a filter. The noisy section is the part before it passes through this filter. Since it's right next to the clean area, crosstalk noise is transmitted from here, and I'm wondering if it might be emitting radiation.
So it seems like it's coming from next door?
This time, I'm wondering if connecting the capacitors in parallel will improve things. Small values and large values are often connected in parallel, but in this example, two identical 0.1 μF capacitors are connected in parallel. As a result, I think it might be quite effective.
Is this what people usually say? By configuring the bypass capacitors in parallel?
It's actually pretty hard when you use different values. For example, when connecting 1000 pF and 0.1 μF in parallel, the impedance curve is something I saw in the simulation. Compared with using two 0.1 μF components like this, there are bad frequency bands. Generally, people tend to think those with a smaller value are effective at high frequencies, but if they are the same size, since the ESR component tends to become quite significant, the results aren't quite what I expected. To achieve the desired results, use methods such as PI analysis. I think we might need to adjust the values so that the impedance matches the expected value.
Connecting 0.1 μF and 1 nF in parallel—I see cases like that quite often, but unless we perform a proper analysis, is it difficult to reduce impedance by simply plugging it in?
That's right. It's quicker to connect the same values in parallel. I think it's probably true.
I see. Thank you. By the way, I only have two of these right now, but for example, if you keep adding them—three, four, and so on—I wonder how that works.
Since this is a parallel connection, if there are two inductance components here, the total inductance will be halved. When it goes from two to three, it becomes one-third. I guess you could say the effects are gradually wearing off.
Does that mean the more you use, the better it gets? Not necessarily. If that's not the case, then I see. Thank you.
Next, as capacitors for resonance suppression, what happens if you install four capacitors? I'm looking at that part. We are comparing patterns placed on the same solder side that contained a lot of noise.
By the way, this is the path from the battery to the oscillator. That's the capacitor you're using in the power cord to prevent resonance, right?
That's right. If you insert a parallel capacitor into this long section, the results show that it improves significantly. I imagine there are some of you who perform resonance analysis and the like, but I actually think this might be quite effective.
Is it okay to be pretty casual about the capacitance values? Or do you actually do a lot of calculations beforehand? What do you think about that?
I think this will be fine as is. I think 0.1 μF should be effective enough. As far as I can tell from the simulation, even if I change the value, I don't think there will be that much of a difference.
When it comes to ESL and the like, it’s definitely better to choose the lower ones.
That's right. I think the lower the ESL, the greater the effect.
Thank you very much.
Up until now, we've been discussing the power system, but this time we'll talk about the signal system. It's sometimes called a “shield” or a “guard ring,” but is it more effective to guard the clock, or not? I'm looking at that.
This involves shielding the cable carrying a 50 MHz signal.
That's right. It's a little faint and hard to see, but we've designed the ground of the guard ring to wrap all the way around from one end to the other. When I use the guard ring, it does seem to improve things a little. I think it might be quite effective.
I guess it feels like it's working by about 4 dB? I wondered whether a guard ring that's quite thin would actually be effective. It's actually working surprisingly well. I thought it was working pretty well.
Even though it's this thin, it really does work, doesn't it?
Next, it is generally believed that placing the wiring in the inner layers reduces noise, so I gave that a try, too. We'll compare the wiring in the area we just shielded with the results when it is placed in Layer 3. It's sandwiched between ground layers above and below. This is the structure of a stripline. When you compare these, things have certainly improved, but my impression is that it hasn't improved as much as I had hoped.
Does effectiveness vary depending on the frequency?
That's right. In this area, noise levels have actually dropped quite sharply at times. As for the frequencies at which peaks occur, there wasn't that much of a difference. In this case, the results turned out something like that.
I've actually taken apart a PS5 before, and it was something similar. The wiring connecting the CPU and the DDR memory depends on the PS5 generation. Whether it is on the surface layer of the circuit board or inside an inner layer can actually be quite different. I wonder if that's how it turned out after simulating that aspect and trying out various approaches. I guess you could call this sharing a little experience.
That's right. Since this is, after all, a 50 MHz bandwidth, when it comes to DDR4 or LPDDR4-class memory, some people say it's better to put it in the inner layer, and actually, I'm starting to think that might be true.
Next, we'll discuss whether it's better or worse to have more ground vias. We're comparing the shielded wiring from earlier with a solid ground pour applied to the surface, and a version with additional ground vias at a 15 mm pitch in that shielding section. Generally speaking, I have the impression that noise levels would go down, but the results weren't very good. In fact, the results show that things have actually gotten a little worse.
I sometimes wonder if it might be better to just go all out with the vias, but does it seem like that might not be the case?
That's right. Next, I tried adding lots of vias. Here are the results of adding them at a 5 mm pitch. In this case, things get a little worse. It gets a little worse, but just a little. That is the result.
I see. Do you have any thoughts on this, like, "How did this happen?"
I can't say for sure about this either, but if you add a lot of ground vias, the current flows in the same direction vertically through the vias. Since the direction of the magnetic flux is aligned with the direction in which the magnetic fields repel each other, my guess is that things might be getting worse.
By the way, we're currently looking at radiated noise, but I wonder if things might look a little different when you look at it in terms of signal quality.
That's right. You're certainly right, and regarding the transmission characteristics up to 20 GHz observed in the simulation, there's a clear difference between the ones with vias and the ones without. The more vias there are, the lower the loss at high frequencies. Since the impedance isn't controlled at 50 Ω, there are a lot of reflections, but even so, adding lots of vias resulted in lower losses. In terms of signal quality, I think it might be better to have more vias.
If about 1 dB of radiated noise is the only difference, I did wonder if I should just keep adding lots of vias to improve the signal quality. What do you think about that?
That's right. I think it depends on the frequency and the application. As for RF-related items, I think it might be better to add a lot of vias. For a clock frequency such as 50 MHz in this case, I'm thinking there probably isn't a need to be so particular about adding lots of vias.
I see. Thank you.
And then there's crossing the slit. If you route the wiring across the slits in the ground plane, it's said that noise increases. When you actually look at it, the noise has increased significantly.
This is probably just as people say.
That's right. That's exactly what they're saying. As a countermeasure for this, here's a stopgap solution: if you route the ground wiring on the component side in a way that acts as a bridge, it's gone down quite a bit. The results show that noise levels have decreased to a level comparable to that of boards without a slit.
You don't have to do everything on that field. Even a small bridge like this is quite effective, isn't it? That's a pretty surprising result, isn't it?
And then there's the right-angle wiring. You often hear that if you arrange the wiring at right angles, electrons will collide there, with noise coming from the corner. I've actually seen the book in question, but I didn't think that was the case, so I built a test board. One is a pattern drawn at a right angle, and one is where I made a gentle turn using a radius. When you compare these, the results show that there isn't much of a difference.
Pretty much 1 dB, maybe around 0.5 dB. Something like that, I guess?
Yeah, it hasn't changed that much.
If you look at this in terms of noise, it doesn't change either, but I suppose you might wonder how it compares in terms of signal quality, right?
At higher frequencies, there are points at this right-angle junction where the impedance drops. Since there is a possibility that the reflection will increase, I think this will be a problem at high frequencies. I'm not saying that I recommend right-angle wiring either. If the wiring is laid out at right angles, the etching solution tends to pool during manufacturing. There are also drawbacks, such as a decrease in yield, so I'm not necessarily recommending right angles. But just because you made it a right angle, noise doesn't increase at frequencies like this. That is what I wanted to prove through experimentation.
By the way, for adding a radius, roughly what frequency range should I start with?
It's just something I saw in a conceptual simulation, but probably anything above about 10 GHz. Right angles are a bit of a problem there. I don't think anything below that is really an issue.
I see. Thank you. Is it over already?
Here's a summary of what we've covered. Since time is running out, please be sure to check this out, everyone. I would appreciate it if you could make a note of this.
In today's session, from the perspective of radiated noise, while some results turned out just as people had predicted, I'm wondering if there might be some that aren't like that. For example, regarding vias, the EMC performance hadn't really changed much, but signal quality had improved. It's kind of like that, isn't it? I got the feeling that the relationship between EMI and signal integrity has become pretty much inseparable.
Now, here's my question: when EMI and signal integrity collide, how do you go about setting priorities in that area? What are some points to keep in mind when applying today's discussion directly to the design?
I think this is a difficult problem, but after all, signal quality is extremely important for ensuring performance. Prioritizing signal quality and addressing EMI elsewhere might be one option. But since addressing EMI early on can make things easier down the road, I guess it depends on the item.
Thank you very much. Since it's time, this was "How PCB Artwork Design Affects EMI: Verifying the Effectiveness of Countermeasures Through Actual Testing," an interview with Ontec Co., Ltd. Thank you very much for today.
Thank you very much.
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